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STLC5466 Arkusz danych(PDF) 57 Page - STMicroelectronics |
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STLC5466 Arkusz danych(HTML) 57 Page - STMicroelectronics |
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57 / 130 page  57/130 STLC5466 VI.29 - Interrupt Register IR (38)H This register is read only. When this register is read by the microprocessor, this register is reset (0000)Η. If not masked, each bit at “1” generates “1” on INT0 pin. Bit 0 and bit 5 to 10 are common to 64 HDLC controllers. HS0/2 : HDLC Interrupt Queue Size These three bits define the size of HDLC status Interrupt Queue in external memory for each channel. The location is IBA+256 (see The Initiate Block Address (IBA)) TBFS : Time Base running with Frame Synchronisation signal TBFS=1, the Time Base defined by the Timer Register (see page 84) is running on the rising edge of Frame Synchronisation signal. TBFS=0, the Time Base defined by the Timer Register is running on the rising edge of MCLK signal. bit15 bit8 bit7 bit0 Nu Nu SFCO PRSR TIM INT FOV INT FWAR Tx FOV Tx FWAR Rx FOV Rx FWAR ICOV MTX MRX C/IRX HDLC After reset (0000)H HDLC : HDLC INTERRUPT HDLC = 1, Tx HDLC or Rx HDLC has generated an interrupt The status is in the HDLC queue. C/IRX : Command/Indicate Rx Interrupt C/IRX = 1, Rx Command/Indicate has generated an interrupt. The status is in the HDLC queue. MRX : Rx MONITOR CHANNEL INTERRUPT MRX = 1, one Rx MONITOR CHANNEL has generated an interrupt. The status is in the Rx Monitor Channel queue MTX : Tx MONITOR CHANNEL INTERRUPT MTX = 1, one or several Tx MONITOR CHANNELS have generated an interrupt. Transmit Monitor Interrupt Register (TMIR) indicates the Tx Monitor Channels which have generated this interrupt. ICOV : INTERRUPT CIRCULAR OVERLOAD ICOV = 1, One of three circular interrupt memories is completed. HS2 HS1 HS0 HDLC Queue Size MS2 MS1 MS0 MON Queue Size CS1 CS0 C/I Queue Size 000128 words000 128 words 0 0 64 words 0 0 1 256 word 0 0 1 256 word 0 1 128 words 010384 words010 384 words 1 0 192 words 011512 words011 512 words 1 1 256 words 100640 words100 640 words 101768 words101 768 words 110896 words110 896 words 1 1 1 1024 words 1 1 1 1024 words |
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