ST25R200 datasheet(23/88 Pages) STMICROELECTRONICS

23 / 88 page

•

The position of the first bit collision detected is available in the collision register

•

The first parity bit is ignored in case the split happens within the byte

5.10.3

EMD handling

Several NFC standards require EMD handling in order to enhance the robustness of the contactless

communication between devices against electromagnetic disturbance. This handling shall be enabled at different

moments of the operation/protocol.

Automatic EMD handling can be enabled by bit emd_en. When enabled, the device monitors the reception, and if

certain errors (framing, parity, CRC, residual bits) are detected on a frame no bigger than emd_thld<3:0>, the

frame is disregarded, the receiver is re-enabled and ready to process an upcoming frame.

During reception, after IRQ I_rxs, if the conditions are met, an IRQ with the flag I_rx_rest is signaled, meaning

that an erroneous frame has been discarded and the receiver has been reset. Then, the device waits for another

incoming frame, which is normally processed by another reception (I_rxs followed I_rxe), or the expiration of the

NRT (I_nre). When EMD handling is enabled the NRT shall be set in nrt_emd mode.

Figure 20. Transceiver operation with EMD handling

RF field

Data

Tx Data

Rx Data

NRT

Rx Data

MRT

Receiver

I_txe

I_rxs I_rx_rest

Interrupts

I_nre

I_rxe

I_rxs

MS71327

5.11

Overshoot/undershoot protection

The overshoot/undershoot protection mechanism makes it possible to control the transmitting waveform during

challenging test conditions. This is accomplished by setting bit patterns in the corresponding registers that control

signals during the transition phase from modulated to unmodulated state and vice versa.

The operation of this mechanism is controlled by the overshoot/undershoot protection registers. The overshoot

mechanism is only effective when bits are written in ov_pattern<7:0>. Setting ov_pattern<7:0>=0 disables the

overshoot protection.

The overshoot mode has to be set in the control bits ov_tx_mode<1:0> and defines the drive level for the

complete bit pattern. Three modes are available:

•

ov_tx_mode<1:0> = 00: the transmitter outputs are driven with VDD_DR when the respective ov_pattern bit

is 1

•

ov_tx_mode<1:0> = 01: the transmitter outputs are driven with VDD_AM when the respective ov_pattern

bit is 1

•

ov_tx_mode<1:0> = 10: the transmitter outputs are stopped (like OOK pause) when the respective

ov_pattern bit is 1

The overshoot protection pattern ov_pattern<7:0> is output with the least significant bit (LSB) first. For the first

eight clock cycles after the transition from modulated to unmodulated state, each of the 8 bits of the overshoot

protection pattern specifies the driver configuration to apply. So, bit ov_pattern0 defines which driver configuration

to apply for the first clock cycle after the transition from modulated to unmodulated state, and ov_pattern7 defines

which driver configuration to apply for the eight clock cycle after the transition from modulated to unmodulated

state.

From the eighth clock cycle onwards, the settings from the Tx driver register are used.

The undershoot protection works in a similar manner for transitions from the unmodulated state of the carrier to

the modulated state of the carrier.

ST25R200

Application information

DS13658 - Rev 2

page 23/88

ST25R200 Arkusz danych(PDF) 23 Page - STMicroelectronics

ST25R200 Arkusz danych(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

Arkusz danych Pobierz

Link URL