P83CE558EBBSLASHYYY datasheet(41/72 Pages) PHILIPS

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Philips Semiconductors

Preliminary specification

P83CE558/P80CE558/P89CE558

Single-chip 8-bit microcontroller

1996 Aug 06

Figure 39. Power control register (PCON).

PCON (87H)

SMOD

ARD

RFI

WLE

GF1

GF0

IDL

Table 39.

Description of PCON bits

SYMBOL

BIT

FUNCTION

SMOD

PCON.7

Double Baud rate bit. When set to logic 1 the baud rate is doubled when the serial port SIO0 is being used in

modes 1, 2, or 3.

ARD

PCON.6

AUX-RAM disable bit. When set to a 1 the internal 768 bytes AUX-RAM is disabled, so that all

MOVX-Instructions access the external data memory – as it is with the standard PCB80C51.

RFI

PCON.5

Reduced radio frequency interference bit. When set to a 1 the toggling of ALE pin is prohibited. This bit is

cleared on RESET (see also sections Features (EMC) and Pinning).

WLE

PCON.4

Watchdog load enable. This flag must be set by software prior to loading timer T3 (watchdog timer). It is cleared

when timer T3 is loaded.

GF1

PCON.3

General-purpose flag bit

GF0

PCON.2

General-purpose flag bit

PCON.1

Power-down bit. Setting this bit activates the power-down mode. It can only be set if input EW is high.

IDL

PCON.0

Idle Mode bit. Setting this bit activates the Idle Mode.

6.11

Power Reduction Modes

Two software-selectable modes of reduced power consumption are

implemented. These are the Idle Mode and the Power-down Mode.

Idle Mode operation permits the interrupt, serial ports and timer

blocks T0, T1 and T3 to function while the CPU is halted. The

following functions are switched off when the microcontroller enters

the Idle Mode:

• CPU

(halted)

• Timer 2

(stopped and reset)

• PWM0, PWM1

(reset, output = HIGH)

• ADC

(aborted if conversion in progress)

The following functions remain active during Idle Mode. These

functions may generate an interrupt or reset and thus terminate the

Idle Mode:

• Timer 0, Timer 1, Timer 3 (Watchdog timer)

• UART

• I2C

• External interrupt

• Seconds Timer

In Power-down Mode the system clock is halted. If the PLL oscillator

is selected (SELXTAL1 = 0) and the RUN32 bit is set, the 32 kHz

oscillator keeps running, otherwise it is stopped. If the HF-oscillator

(SELXTAL1 = 1) is selected, it is stopped after setting the bit PD in

the PCON register.

Table 40.

External Pin Status During Idle and Power-Down Modes

MODE

MEMORY

ALE

PSEN

PORT 0

PORT 1

PORT 2

PORT 3

PORT 4

SCL/SDA

PWM0/PWM1

Idle

Internal

data

operative (1)

HIGH

Idle

External

high-Z

data

address

data

operative (1)

HIGH

Power-down

Internal

data

high-Z

HIGH

Power-down

External

high-Z

data

high-Z

HIGH

NOTE:

1. In Idle Mode SCL and SDA can be active as outputs only if SIO1 is enabled; if SIO1 is disabled (S1CON.6/ENS1 = 0) these pins are in a

high-impedance state.

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