P83CE558EBBSLASHYYY datasheet(37/72 Pages) PHILIPS

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Philips Semiconductors

Preliminary specification

P83CE558/P80CE558/P89CE558

Single-chip 8-bit microcontroller

1996 Aug 06

The polling cycle is repeated with every machine cycle, and the

values polled are the values present at S5P2 of the previous

machine cycle. Note that if an interrupt flag is active but is not being

responded to because of one of the above conditions, and if the flag

is inactive when the blocking condition is removed, then the blocked

interrupt will not be serviced. Thus, the fact that the interrupt flag

was once active but not serviced is not remembered. Every polling

cycle is new.

The processor acknowledges an interrupt request by executing a

hardware-generated LCALL to the appropriate service routine. In

some cases it also clears the flag which generated the interrupt, and

in others it does not. It clears the Timer 0, Timer 1, and external

interrupt flags. An external interrupt flag (IE0 or IE1) is cleared only if

it was transition-activated. All other interrupt flags are not cleared by

hardware and must be cleared by the software. The LCALL pushes

the contents of the program counter on to the stack (but it does not

save the PSW) and reloads the PC with an address that depends on

the source of the interrupt being vectored to as shown in Table 38.

Execution proceeds from the vector address until the RETI

instruction is encountered. The RETI instruction clears the “priority

level active” flip-flop that was set when this interrupt was

acknowledged. It then pops the top two bytes from the stack and

reloads the program counter. Execution of the interrupted program

continues from where it was interrupted.

Figure 34. Interrupt enable register (IEN0).

IEN0 (A8H)

EAD

ES1

ES0

ET1

EX1

ET0

EX0

Table 33.

Description of IEN0 bits

SYMBOL

BIT

FUNCTION

IEN0.7

Global enable/disable control

0 =

No interrupt is enabled

1 =

Any individually enabled interrupt will be accepted

EAD

IEN0.6

Enable ADC interrupt

ES1

IEN0.5

Enable SIO1 (I2C) interrupt

ES0

IEN0.4

Enable SIO0 (UART) interrupt

ET1

IEN0.3

Enable Timer 1 interrupt

EX1

IEN0.2

Enable External interrupt 1 / Seconds interrupt

ET0

IEN0.1

Enable Timer 0 interrupt

EX0

IEN0.0

Enable External interrupt 0

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