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P83CE558EBB/YYY Arkusz danych(PDF) 61 Page - NXP Semiconductors |
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P83CE558EBB/YYY Arkusz danych(HTML) 61 Page - NXP Semiconductors |
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61 / 72 page ![]() Philips Semiconductors Preliminary specification P83CE558/P80CE558/P89CE558 Single-chip 8-bit microcontroller 1996 Aug 06 61 DC ELECTRICAL CHARACTERISTICS (Continued) VDD = 5 V (± 10%), VSS = 0 V, Tamb = –40°C to +85°C (P8xCE558EFx). DC parameters not included here are the same as in the P8xCE558EBx, DC electrical characteristics All voltages with respect to VSS unless otherwise specified. TEST LIMITS SYMBOL PARAMETER CONDITIONS MIN MAX UNIT RRST Internal reset pull-down resistor 50 150 k Ω CIO Pin capacitance Test freq = 1MHz, Tamb = 25 °C 10 pF Inputs VIL Input LOW voltage, except EA, SCL, SDA –0.5 0.2VDD–0.15 V VIL1 Input LOW voltage to EA –0.5 0.2VDD–0.35 V VIH Input HIGH voltage, except XTAL1, RSTIN, SCL, SDA, ADEXS 0.2VDD+1.0 VDD+0.5 V VIH1 Input HIGH voltage, XTAL1, RSTIN, ADEXS 0.7VDD+0.1 VDD+0.5 V IIL Input current LOW level, Ports 1, 2, 3, 4 VIN = 0.45 V –75 µA ITL Transition current HIGH to LOW, Ports 1, 2, 3, 4 See note 6 –750 µA NOTES: See Page 62. DC ELECTRICAL CHARACTERISTICS ANALOG AVDD = 5 V (± 10%), AVSS = 0 V, Tamb = 0 °C to +70 °C (P8xCE558EBx). AVDD = 5 V (± 10%), AVSS = 0 V, Tamb = –40 °C to +85 °C (P8xCE558EFx). All voltages with respect to VSS unless otherwise specified. TEST LIMITS SYMBOL PARAMETER CONDITIONS MIN MAX UNIT AVDD Analog supply voltage AVDD = VDD ± 0.2 V 4.5 5.5 V AIDD Analog supply current operating Port 5 = 0 to AVDD see notes 1 and 2 1.2 mA AIDD Analog supply current operating: 32 kHz/PLL operation Port 5 = 0 to AVDD see note 17, 18 7.2 mA AIID Analog supply current Idle Mode see notes 1 and 3 70 mA AIID Analog supply current Idle Mode: 32 kHz/PLL operation see note 17 6.0 mA AIPD Supply current Power-down mode 2 V < VPD < VDDmax see note 4 50 µA AIPD Supply current Power-down mode: 32 kHz / PLL operation VDD = 5.5V see note 17 200 µA Analog Inputs AVIN Analog input voltage AVSS–0.2 AVDD+0.2 V AVREF Reference voltage: AVREF– AVSS–0.2 V AVREF+ AVDD+0.2 V RREF Resistance between AVREF+ and AVREF– 10 50 k Ω CIA Analog input capacitance 15 pF DLe Differential non-linearity 9, 10, 11, ±1 LSB ILe Integral non-linearity 9, 12 ±2 LSB OSe Offset error 9, 13 ±2 LSB Ge Gain error 9, 14 ±0.4 % Ae Absolute voltage error 9, 15 ±3 LSB MCTC Channel to channel matching ±1 LSB Ct Crosstalk between inputs of port 5 16 0–100kHz –60 dB NOTES: See Page 62. |
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