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IXP45X Arkusz danych(PDF) 78 Page - Intel Corporation |
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IXP45X Arkusz danych(HTML) 78 Page - Intel Corporation |
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78 / 148 page ![]() Intel® IXP45X and Intel® IXP46X Product Line of Network Processors—Datasheet Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Datasheet August 2006 78 Document Number: 306261-004US B1 VSS XXX B2 VSS XXX B3 DDRI_CB[2] X X B4 DDRI_CB[1] X X B5 DDRI_CK[1] X X X B6 DDRI_DQS[3] X X X B7 DDRI_DQ[31] X X X B8 DDRI_DQ[24] X X X B9 DDRI_DQ[21] X X X B10 DDRI_DQ[23] X X X B11 DDRI_DQ[17] X X X B12 DDRI_MA[5] X X X B13 DDRI_MA[7] X X X B14 DDRI_MA[9] X X X B15 DDRI_MA[11] X X X B16 DDRI_CS_N[0] X X X B17 DDRI_RAS_N X X X B18 DDRI_VREF X X X B19 DDRI_DQS[1] X X X B20 DDRI_DQ[14] X X X B21 DDRI_DQS[0] X X X B22 DDRI_DQ[5] XXX B23 DDRI_DQ[7] XXX B24 VCCP XXX B25 USB_HPEN XXX B26 VSS XXX Table 26. Processors’ Ball Map Assignments (Sheet 2 of 26) Ball Signal Name Processor Number Pin Configurations Intel® IXP465 Intel® IXP460 Intel® IXP455 Note: Interfaces not being utilized at a system level may require external pull-up or pull-down resistors. For specific details and requirements, see Section 4.2, “Functional Signal Definitions” on page 43. Note: Pin Configuration is set by the Expansion bus configuration when Reset is deasserted. Note: Blank field indicates no physical ball on package. |
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