| Zakładka z wyszukiwarką danych komponentów |
|
IXP45X Arkusz danych(PDF) 9 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
IXP45X Arkusz danych(HTML) 9 Page - Intel Corporation |
|
9 / 148 page ![]() Intel® IXP45X and Intel® IXP46X Product Line of Network Processors August 2006 Datasheet Document Number: 306261-004US 9 Datasheet—Intel® IXP45X and Intel® IXP46X Product Line of Network Processors 1.0 Product Features 1.1 Product Line Features This document discusses all features supported on the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors. A subset of these features is supported by certain processors in the IXP45X/IXP46X product line, such as the Intel® IXP460 or Intel® IXP455 network processors. For details on feature support listed by processor, see Table 1 on page 13. Some of the features described in this document require software delivered by Intel. Some features may not be enabled with current software releases. The features that require software are identified within this document. Please refer to the Intel® IXP400 Software Programmer’s Guide for information on which features are enabled at this time. •Intel XScale® Processor (compliant with Intel® StrongARM* architecture) — High-performance processor based on Intel XScale® Technology — Seven/eight-stage Intel® Super-Pipelined RISC Technology — Memory Management Unit (MMU) • 32-entry, data memory management unit • 32-entry, instruction memory management unit (MMU) • 32-KByte, 32-way, set associative instruction cache • 32-KByte, 32-way, set associative data cache • 2-KByte, two-way, set associative mini-data cache • 128-entry, branch target buffer • Eight-entry write buffer • Four-entry fill and pend buffers — Clock speeds: • 266 MHz • 400 MHz • 533 MHz • 667 MHz (Not supported on Intel® IXP455 Network Processor) —Intel® StrongARM* Version 5TE Compliant —Intel® Media Processing Technology Multiply-accumulate coprocessor — Debug unit Accessible through JTAG port •PCI interface — 32-bit interface — Selectable clock • 33-MHz clock output produced by GPIO15 • 1- to 66-MHz clock input — PCI Local Bus Specification, Revision 2.2 compatible — PCI arbiter supporting up to four external PCI devices (four REQ/GNT pairs) — Host/option capable — Master/target capable — Two DMA channels • USB 1.1 device controller |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |