IXP45X datasheet(11/148 Pages) INTEL

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Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

August 2006

Datasheet

Document Number: 306261-004US

Datasheet—Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

• Cryptography Unit

— Exponentiation Unit (EAU)

— Random Number Generator (RNG)

— Secure Hash Algorithm (SHA)

•Two UART Interfaces

— 1,200 Baud to 921 Kbaud

— 16550 compliant

— 64-byte Tx and Rx FIFOs

— CTS and RTS modem-control signals

• Synchronous Serial Port Interface

—Master Mode Only

— Motorola’s Serial Peripheral Interface (SPI)

— National’s Microwire*

— Texas Instruments’ synchronous serial protocol (SSP)

•I2C interface

— Multi-master capable

—Slave capable

— Fast-mode support 400 Kbps

— Slow-mode support 100 Kbps

• Internal bus performance monitoring unit (IBPMU)

— Seven 27-bit event counters

— Monitoring of internal-bus occurrences and duration events

• 16 GPIOs

• Four internal timers

—Watchdog Timer

— General-Purpose Timer

— Two one-shot timers

•Packaging

— 544-pin PBGA

— Commercial temperature (0° to 70° C)

— Extended temperature (-40° to 85° C)

—Lead Free Support

The remaining features described in the product line features list require software in

order for these features to be functional. To determine if the feature is enabled, see the

Intel® IXP400 Software Programmer’s Guide.

• Three network processor engines (NPEs)Note 1

Used to off load typical Layer-2 networking functions such as:

— Ethernet filtering

—ATM SARing

—HDLC

— Layer-2 switching

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