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IXP45X Arkusz danych(PDF) 48 Page - Intel Corporation |
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IXP45X Arkusz danych(HTML) 48 Page - Intel Corporation |
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48 / 148 page ![]() Package Information August 2006 Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Datasheet 48 Document Number: 306261-004US PCI_PERR_N Z Z VB VB I/O PCI Parity Error asserted when a PCI parity error is detected — between the PCI_PAR and associated information on the PCI_AD bus and PCI_CBE_N — during all PCI transactions, except for Special Cycles. The agent receiving data will drive this signal. When this interface/signal is enabled and is not being used in a system design, the interface/signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse (refer to Expansion Bus Controller chapter of the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Developer’s Manual) and is not being used in a system design, this interface/ signal is not required for any connection. PCI_SERR_N Z Z VB VB I/OD PCI System Error asserted when a parity error occurs on special cycles or any other error that will cause the PCI bus not to function properly. This signal can function as an input or an open drain output. When this interface/signal is enabled and is not being used in a system design, the interface/signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse (refer to Expansion Bus Controller chapter of the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Developer’s Manual) and is not being used in a system design, this interface/ signal is not required for any connection. PCI_DEVSEL_N Z Z VB VB I/O PCI Device Select: • When used as an output, PCI_DEVSEL_N indicates that device has decoded that address as the target of the requested transaction. • When used as an input, PCI_DEVSEL_N indicates if any device on the PCI bus exists with the given address. When this interface/signal is enabled and is not being used in a system design, the interface/signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse (refer to Expansion Bus Controller chapter of the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Developer’s Manual) and is not being used in a system design, this interface/ signal is not required for any connection. PCI_IDSEL Z Z VI VI I PCI Initialization Device Select is a chip select during configuration reads and writes. When this interface/signal is enabled and is not being used in a system design, the interface/signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse (refer to Expansion Bus Controller chapter of the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Developer’s Manual) and is not being used in a system design, this interface/ signal is not required for any connection. PCI_REQ_N[3:1] Z Z VI VI I PCI arbitration request: Used by the internal PCI arbiter to allow an agent to request the PCI bus. When this interface/signal is enabled and is not being used in a system design, the interface/signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the PCI soft fuse (refer to Expansion Bus Controller chapter of the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Developer’s Manual) and is not being used in a system design, this interface/ signal is not required for any connection. Table 11. PCI Controller (Sheet 3 of 4) Name Power on Reset† Reset† Normal After Reset Until Software Enables Possible Configur ations After Software Enables Type† Description Note: This table discusses all features supported on the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors. For details on feature support listed by processor, see Table 1 on page 13. † For a legend of the Type codes, see Table 8 on page 43. |
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